The present invention relates generally to integrated circuits, and more specifically to the generation of voltages in integrated circuits.
A supply voltage VCC is applied to a typical integrated circuit, and within the integrated circuit a variety of different voltages arc derived from this supply voltage and utilized during operation. For example, in a typical memory device, such as a dynamic random access memory (DRAM), a voltage pump generates a negative back bias voltage that is applied to the bodies of MOS transistors forming the DRAM. A typical DRAM also includes a voltage pump for generating a pumped supply voltage VCCP having a magnitude greater than a magnitude of the supply voltage VCC, with the pumped supply voltage being applied to word lines to access data stored in rows of memory cells.
A typical DRAM includes a number of memory cells arrays, each array including a plurality of memory cells arrays arranged in rows and columns. Each memory cell stores a bit of data in the form of an electric charge stored on a capacitor, and each memory cell in a given row is coupled to a corresponding word line. In a DRAM, the data stored in the memory cells must periodically be xe2x80x9crefreshedxe2x80x9d since the charge stored on each capacitor, which represents the stored data, leaks over time. Accordingly, DRAMs perform what are known as refresh cycles during which all rows of memory cells are accessed to recharge the respective charges stored on the capacitors and thereby refresh the stored data. To access the data stored in a row of memory cells, the pumped supply voltage is applied to the corresponding word line. A refresh cycle is initiated in response to a refresh command applied to the DRAM, or is initiated automatically within the DRAM when the DRAM operates in an auto-refresh mode after an auto-refresh command is applied to the DRAM, as will be understood by those skilled in the art.
During a refresh cycle, data stored in DRAM cannot be accessed and thus it is desirable to reduce the time of a refresh cycle. To minimize the duration of a refresh cycle, DRAMs utilize row compression, meaning that multiple rows of memory cells in multiple arrays are simultaneously accessed to simultaneously refresh the associated data This reduces the duration of the refresh cycle by reducing the time required to access every row in each array in the DRAM. Accessing multiple rows of memory cells simultaneously, however, increases the current drawn from the voltage pump generating the pumped supply voltage VCCP because multiple word lines must now be charged in parallel to the required voltage levels. As a result, the voltage pump generating VCCP must maintain the voltage VCCP at a minimum value VMIN to ensure that if an auto-refresh command is received the voltage VCCP does not drop below a lower threshold voltage VLT. The voltage VCCP cannot be allowed to drop below the lower threshold voltage VLT and proper operation of the DRAM ensured, as will be appreciate by those skilled in the art.
FIG. 1 is a signal diagram illustrating the voltage VCCP generated by a conventional voltage pump as a function of time. A maximum value VMAX and the minimum value VMIN define the hysteresis of the voltage pump. From a time T0 to a time T1 the pump activated, and operates to charge the voltage VCCP until it reaches VMAX, at which point the pump is deactivated and the voltage VCCP decays. When the voltage VCCP reachs VMIN, the pump is once again activated an begins charging VCCP once again. The value VMIN must be maintained above the lower threshold value VLT in the event that an auto-refresh command is received when the voltage VCCP is at VMIN, as previously mentioned. For example, if a received auto-refresh command results in increased demand from the voltage pump at a time T2 when the voltage VCCP is at VMIN. As used herein, increased demand of the voltage pump means increased current drawn from the pump or increased power consumption from the pump, and may simply be referred to as demand on the supply voltage VCCP instead demand on the pump generating that supply voltage. A dotted line 100 indicates the voltage VCCP just after the time T2 if demand increases at T2 due to an auto-refresh command. Because VMIN is greater than VLT, VCCP never drops below VLT as required, even when increased demand occurs at a time T2 when VCCP=VMIN. Note that if demand increases at any time other than T2, then VCCP does not equal VMIN so there is no concern that VCCP will drop below VLT.
While conventional voltage pumps that operate as illustrated in FIG. 1 ensure proper operation of the DRAM, such pumps consume a relatively large amount of power since they must operate to maintain VCCP between VMAX and VMIN just in case demand increases responsive to an auto-refresh command when VCCP=VMIN. This may limit the use of the DRAM in low power applications, such as in portable batter-powered devices. The relatively large value VMAX also stresses components in the DRAM and thus can reduce the life of such components, as will be appreciated by one skilled in the art. Moreover, although the above discussion deals with the pumped voltage VCCP, the same principles and concepts apply to the previously mentioned back-bias voltage, and to any other voltage sources that may experience increased demand in response to a command applied to the DRAM or other type of integrated circuit.
There is a need for a method and system of lowering the power consumption and improving the operation of voltage generators contained in integrated circuits.
According to one aspect of the present invention, a voltage generation circuit includes a voltage pump that receives a supply voltage and develops an output voltage responsive to a pump activation signal. A level detection circuit receives a pump-boost signal and is coupled to the voltage pump to receive the output voltage. The level detection circuit operates in a normal mode responsive to the pump-boost signal being inactive to develop the pump activation signal to activate the voltage pump responsive to the output voltage being less than or equal to a first low threshold value. The level detection circuit operates in a demand-controlled mode responsive to the pump-boost signal being active to develop the pump activation signal to activate the voltage pump responsive to the output voltage being less than or equal to a second low threshold value.